诺森微机原理及应用丁艳编著9787118104103国防工业出版社

Chapter 1 Fundamentals of Computer
1.1 Number System
1.1.1 Basic Number Systems
1.1.2 Conversions between Different Number Systems
1.1.3 Common Data Units
1.2 Logic Algebra and Logic Gates
1.2.1 "OR" Oraio and "OR" Gate
1.2.2 "AND" Oraio and "AND" Gate
1.. "NOT" Oraio and the NOT-Inverter
1.2.4 Basic Rules of Boolean Algebra
1.3 Binary Numbers and Binary Addition/Subtraction
1.3.1 Negative Binary Numbers
1.3.2 Binary Addition
1.3.3 Binary Subtraction
1.3.4 Adder Circuits


Chapter 1  Fundamentals of Computer
    1.1  Number System
        1.1.1  Basic Number Systems
        1.1.2  Conversions between Different Number Systems
        1.1.3  Common Data Units
    1.2  Logic Algebra and Logic Gates
        1.2.1  "OR" Oraio and "OR" Gate
        1.2.2  "AND" Oraio and "AND" Gate
        1..  "NOT" Oraio and the NOT-Inverter
        1.2.4  Basic Rules of Boolean Algebra
    1.3  Binary Numbers and Binary Addition/Subtraction
        1.3.1   Negative Binary Numbers
        1.3.2  Binary Addition
        1.3.3  Binary Subtraction
        1.3.4  Adder Circuits
        1.3.5  Switchable Inverter and Binary Addition/Subtraction Circuit
    1.4  Computer Data Formats
        1.4.1  ACSII Code
        1.4.2  BCD ( Binary-Coded Decimal) Format
    1.5  Logic Circuit
        1.5.1  Logic Gates
        1.5.2  Flip-Flops
        1.5.3  Registers
        1.5.4  Tri-state Gate and BUS Structure
    Tips
    Exercise
Chapter 2  System Organization of Microcomputer
    2.1  The Basic System Components
        2.1.1  CPU (Central Processing Unit)
        2.1.2  The System Bus
        2.1.3  The Memory Subsystem
        2.1.4  The I/O Subsystem
    2.2  A Simple Computer
        2.2.1  Introduction
        2.2.2  Architecture of the Simple Computer
        2..  Instruction Set of the Simple Computer
        2.2.4  Encoding Instructions
        2.2.5  Organization of the Control Unit
        2.2.6  Step-by-Step Instruction Execution
    Tips
    Exercise
Chapter 3  Intel 8086 Microprocessor
    3.1  The History of Intel Microprocessor Family
    3.2  8086 CPU Architecture
        3.2.1  Execution Unit and Bus Interface Unit
        3.2.2  Organization of Execution Unit
        3..  Organization of Bus Interface Unit (BIU)
    3.3  Internal Memory
        3.3.1  Addressing Data in Memory
        3.3.2  Memory Segment
        3.3.3  Segment Boundary
        3.3.4  Segment Offset
        3.3.5  About Stack Segment
    3.4  System Timing
        3.4.1  The System Clock
        3.4.2  Memory Access Time
        3.4.3  Wait States
        3.4.4  Bus Cycle
    3.5  8086 Pin AssignmensndWrking Modes
        3.5.1  Pins and Their Function Descriptions
        3.5.2  Working Modes
    3.6  Basic Oraios of 8086/8088
        3.6.1  Reset Oraio
        3.6.2  Input and Output for 8086 Minimum Mode
        3.6.3  Bus Request and Bus Grant Timing in Minimum Mode
        3.6.4  Interrupt Oraio
        3.6.5  Interrupt Oraios in Maximum Mode
    Tips
    Exercise
Chapter 4  8086 Address Mode and Assembly Instructions
    4.1  8086 Assembly Instruction Format
    4.2  8086 Addressing Modes
       4.2.1  Immediate Addressing
       4.2.2  Direct Addressing
       4..  Register Addressing
       4.2.4  Register Indirect Addressing
       4.2.5  Register Relative Addressing
       4.2.6  Base-plus-Index Addressing
       4.2.7  Base Relative-plus-Index Addressing
    4.3  Data Movement Instructions
       4.3.1  MOV Instruction
       4.3.2  PUSH and POP
       4.3.3  XCHG Instruction
       4.3.4  XLAT Instruction
       4.3.5  LEA Instruction
       4.3.6  LDSandLES
       4.3.7  Flags Register Movement Instruction
       4.3.8  IN and OUT
    4.4  Arithmetic Instructions and Logic Instructions
       4.4.1  ADD and SUB Function
       4.4.2  INC and DEC Function
       4.4.3  NEG and CMP Function
       4.4.4  MUL and DIV Function
       4.4.5  Type Conversion Functions
       4.4.6  BCD Conversion Functions
       4.4.7  Boolean Oraios
       4.4.8  Shifting and Rotation
    4.5  String Instructions
        4.5.1  The Direction Flag
        4.5.2  String Data Transfers
        4.5.3  String Comparisons
    4.6  Program Control Instructions
        4.6.1  Program Flow Control Instructions
        4.6.2  Machine Control and Miscellaneous Instructions
    4.7  The Symbolic Instruction Set
    Tips
    Exercise
Chapter 5  Directives and Macro Processing
    5.1  The Format of the Directives
    5.2  Operators and Expression
    5.3  Directives
       5.3.1  Data Definition and Storage Allocation
       5.3.2  EU Directive
       5.3.3  Segment Definition Directive
       5.3.4  Assume Directive
       5.3.5  PROC Directive
       5.3.6  END Directive
       5.3.7  ORG Directive
       5.3.8  Structures
       5.3.9  Records
       5.3.10  The PAGE and TITLE Listing Directives
       5.3.11  EXTRN/EXTERN Directive
       5.3.12  GROUP Directive
       5.3.13  INCLUDE Directive
       5.3.14  LABEL Directive
    5.4  Macro Processing
       5.4.1  Macro Definition
        5.4.2  Macro Sequence and Procedure Calling
        5.4.3  Macro Directives
    5.5  DOS Function Calls
        5.5.1  The IBM PCBIOS
        5.5.2  An Introduction to MS-DOS Services
        5.5.3  MS-DOS Calling Sequence
        5.5.4  Frequently Used MS-DOS Functions
    5.6  Assembling, Linking and Executing a Program
        5.6.1  The Assembler and Linker
        5.6.2  Assembling a Source Program
        5.6.3  Linking an Object Program
        5.6.4  Executing a Program
        5.6.5  Using the DEBUG Program
        5.6.6  DEBUG Commands Exercise
    Tips
    Exercise
Chapter 6  Programming with Assembly Language
    6.1  Design of Assembly Program
    6.2  Simple Procedures Designing
    6.3  Branch and Looping Procedures
    6.4  Procedure Call and Return
    6.5  Programming Examples
    Tips
    Exercise
Chapter 7  Memory System
    7.1   Overview of the Memory
        7.1.1  Non-Volatile Memory
        7.1.2  Volatile Memory
        7.1.3  Performance Index of Memory System
    7.2  Memory Devices
        7.2.1  SRAM 6264
        7.2.2  SRAM6116
        7..  DRAM 2164A
        7.2.4  EPROM 2764A
    7.3  Memory Module Design
        7.3.1   Memory Pin Connections
        7.3.2  Memory Module Design
        7.3.3  Memory Expansion Examples
    Tips
    Exercise
Chapter 8  I/O Interfaces
    8.1  L/O Instructions
    8.2  L/O Interfacing Methods
    8.3  Serial Interface and Serial Communication
        8.3.1  Serial Interface
        8.3.2  Basic Serial Transmission Lines
        8.3.3  Asynchronous and Synchronous Communication
    8.4  8251A Programmable Communication Interface
        8.4.1  The Architecture of the 8251A
        8.4.2  The Application of the 8251 A
        8.4.3  The Initialization of the 8251A
    8.5  Parallel Communication Interface
    8.6  8255A Programmable Peripheral Interface
        8.6.1  The Architecture of the 8255A
        8.6.2  The Function Description of the 8255A
        8.6.3  The Communication Mode of 8255A
        8.6.4  The Initialization and Programming of 8255A
    8.7  Programmable Timer and Event Counter
    8.8  Intels 8253 Programmable Timer/Counter
        8.8.1  The Architecture of 8253
        8.8.2  The Oraio Mode Definition of 8253
        8.8.3  Examples of 8253 Timer/Counter
    Tips
    Exercise
Appendix A  8086/8088 Instruction Set Summary
Appendix B  Vocabulary and Terms
Reference